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anonymous No title
Python
//
// @author Jadbrother modified by gero
//
//@version=2
study(title = "RCI3lines", shorttitle = "RCI3lines")

itvs = input(9, "short interval")
itvm = input(27, "middle interval")
itvl = input(108, "long interval")
src = input(close, "source")
upperband=input(title="High line[%]",defval=80,type=integer)
lowerband=input(title="Low line[%]",defval=-80,type=integer)

ord(seq, idx, itv) =>
    p = seq[idx]
    o = 1
    s = 0
    for i = 0 to itv - 1
        if p < seq[i]
            o := o + 1
        else
            if p == seq[i]
                s := s+1
                o+(s-1)/2.0
    o

d(itv) =>
    sum = 0.0
    for i = 0 to itv - 1
        sum := sum + pow((i + 1) - ord(src, i, itv), 2)
    sum

rci(itv) => (1.0 - 6.0 * d(itv) / (itv * (itv * itv - 1.0))) * 100.0

hline(upperband,color=gray,linestyle=dashed)
hline(lowerband,color=gray,linestyle=dashed)
plot(rci(itvs), title = "RCI short", color = red)
plot(rci(itvm), title = "RCI middle", color = green)
plot(rci(itvl), title = "RCI long", color = blue)
anonymous No title
Python
//
// @author Jadbrother modified by gero
//
//@version=2
study(title = "RCI3lines", shorttitle = "RCI3lines")

itvs = input(9, "short interval")
itvm = input(36, "middle interval")
itvl = input(52, "long interval")
src = input(close, "source")
upperband=input(title="High line[%]",defval=80,type=integer)
lowerband=input(title="Low line[%]",defval=-80,type=integer)

ord(seq, idx, itv) =>
    p = seq[idx]
    o = 1
    s = 0
    for i = 0 to itv - 1
        if p < seq[i]
            o := o + 1
        else
            if p == seq[i]
                s := s+1
                o+(s-1)/2.0
    o

d(itv) =>
    sum = 0.0
    for i = 0 to itv - 1
        sum := sum + pow((i + 1) - ord(src, i, itv), 2)
    sum

rci(itv) => (1.0 - 6.0 * d(itv) / (itv * (itv * itv - 1.0))) * 100.0

hline(upperband,color=gray,linestyle=dashed)
hline(lowerband,color=gray,linestyle=dashed)
plot(rci(itvs), title = "RCI short", color = red)
plot(rci(itvm), title = "RCI middle", color = blue)
plot(rci(itvl), title = "RCI long", color = green)
anonymous No title
Python
//@version=3
study("MTF 8 SMA/EMA", overlay=true)

// SMA or EMA
SEswitch = input(title="on:EMA off:SMA", type=bool, defval=true)

//Get EMA Values
maA = input(title='MA1 期間', type=integer, minval=1, step=1, defval=10)
maB = input(title='MA2 期間', type=integer, minval=1, step=1, defval=75)
maC = input(title='MA3 期間', type=integer, minval=1, step=1, defval=10)
maD = input(title='MA4 期間', type=integer, minval=1, step=1, defval=75)
maE = input(title='MA5 期間', type=integer, minval=1, step=1, defval=10)
maF = input(title='MA6 期間', type=integer, minval=1, step=1, defval=75)
maG = input(title='MA7 期間', type=integer, minval=1, step=1, defval=10)
maH = input(title='MA8 期間', type=integer, minval=1, step=1, defval=75)


//Set resolutions
resA = input(title='MA1 時間足', type=resolution, defval="5")
resB = input(title='MA2 時間足', type=resolution, defval="5")
resC = input(title='MA3 時間足', type=resolution, defval="15")
resD = input(title='MA4 時間足', type=resolution, defval="15")
resE = input(title='MA5 時間足', type=resolution, defval="60")
resF = input(title='MA6 時間足', type=resolution, defval="60")
resG = input(title='MA7 時間足', type=resolution, defval="240")
resH = input(title='MA8 時間足', type=resolution, defval="240")


//Set switches
emaAswitch = input(title="MA1 On/Off", type=bool, defval=true)
emaBswitch = input(title="MA2 On/Off", type=bool, defval=true)
emaCswitch = input(title="MA3 On/Off", type=bool, defval=true)
emaDswitch = input(title="MA4 On/Off", type=bool, defval=true)
emaEswitch = input(title="MA5 On/Off", type=bool, defval=true)
emaFswitch = input(title="MA6 On/Off", type=bool, defval=true)
emaGswitch = input(title="MA7 On/Off", type=bool, defval=true)
emaHswitch = input(title="MA8 On/Off", type=bool, defval=true)

//get data
dataA = security(tickerid, resA, SEswitch ? ema(close, maA) : sma(close, maA))
dataB = security(tickerid, resB, SEswitch ? ema(close, maB) : sma(close, maB))
dataC = security(tickerid, resC, SEswitch ? ema(close, maC) : sma(close, maC))
dataD = security(tickerid, resD, SEswitch ? ema(close, maD) : sma(close, maD))
dataE = security(tickerid, resE, SEswitch ? ema(close, maE) : sma(close, maE))
dataF = security(tickerid, resF, SEswitch ? ema(close, maF) : sma(close, maF))
dataG = security(tickerid, resG, SEswitch ? ema(close, maG) : sma(close, maG))
dataH = security(tickerid, resH, SEswitch ? ema(close, maH) : sma(close, maH))

//Plotting
plot(emaAswitch ? dataA : na, color=blue, linewidth=3)
plot(emaBswitch ? dataB : na, color=lime, linewidth=3)
plot(emaCswitch ? dataC : na, color=yellow, linewidth=3)
plot(emaDswitch ? dataD : na, color=orange, linewidth=3)
plot(emaEswitch ? dataE : na, color=red, linewidth=3)
plot(emaFswitch ? dataF : na, color=fuchsia, linewidth=3)
plot(emaGswitch ? dataG : na, color=maroon, linewidth=3)
plot(emaHswitch ? dataH : na, color=white, linewidth=4)
anonymous No title
Python
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anonymous vuex-persisted-state filter example
JavaScript
    filter(mutation) {
        const t = mutation.type;
        const except_table = { 
            initChanging: 1,
            storeChanging: 1,
            deleteLoadingDialog: 1,
            deleteLoadingNodeDialog: 1,
            "route/ROUTE_CHANGED": 1
        };
        if(except_table[t]) {
            return false;
        }
        return true;
    },
anonymous No title
Python
ifeq ($(VERBOSE),1)
ECHO := 
else
ECHO := @
endif

TARGET := HostProgram

# Where is the Altera SDK for OpenCL software?
ifeq ($(wildcard $(ALTERAOCLSDKROOT)),)
$(error Set ALTERAOCLSDKROOT to the root directory of the Altera SDK for OpenCL software installation)
endif
ifeq ($(wildcard $(ALTERAOCLSDKROOT)/host/include/CL/opencl.h),)
$(error Set ALTERAOCLSDKROOT to the root directory of the Altera SDK for OpenCL software installation.)
endif

# Directories.
HOST_DIR := host
TARGET_DIR := bin
INC_DIRS := 
LIB_DIRS := /usr/local/altera/15.0/hld/board/terasic/de5net/tests/common/lib

# All include files.
INC_FILES := $(foreach D,$(INC_DIRS),$(wildcard $D/*.h))

# Source files.
SRCS :=  $(wildcard host/src/*.cpp)

# Libraries.
LIBS :=

# Compiler.
CC := g++ -O3 -fopenmp
#CC := icpc -qopt-report-phase=all -qopt-report-phase=openmp -O3 -xHost -qopenmp

# OpenCL compile and link flags.
AOCL_COMPILE_CONFIG := $(shell aocl compile-config)
AOCL_LINK_CONFIG := $(shell aocl link-config)

# Compilation flags
ifeq ($(DEBUG),1)
CXXFLAGS += -g
endif

# Make it all!
all : $(TARGET_DIR)/$(TARGET)

# Host executable target.
$(TARGET_DIR)/$(TARGET) : Makefile $(SRCS) $(INC_FILES)
	@[ -d $(TARGET_DIR) ] || mkdir $(TARGET_DIR)
	$(ECHO)$(CC) $(CXXFLAGS) -fPIC $(foreach D,$(INC_DIRS),-I$D) \
			$(AOCL_COMPILE_CONFIG) $(SRCS) $(AOCL_LINK_CONFIG) \
			$(foreach D,$(LIB_DIRS),-L$D) \
			$(foreach L,$(LIBS),-l$L) \
			-o $(TARGET_DIR)/$(TARGET) -fopenmp

# Device executable target
HOST = host/src/main.cpp

KERNAME = svd4
DEVICE = device/$(KERNAME).cl
OUTPUT = bin/$(KERNAME)

dev: $(DEVICE)
#	aoc -v -g $(DEVICE) -o $(OUTPUT).aocx -report -board=p385a_sch_ax115
	aoc -v -g $(DEVICE) -o $(OUTPUT).aocx -report

firststage: $(DEVICE)
	aoc -v -c $(DEVICE) -o $(OUTPUT)_fststg.aoco -report 

secondstage:
	aoc -v $(OUTPUT).aoco -o $(OUTPUT).aocx -report

emulate: $(DEVICE)
	aoc -march=emulator -v -g $(DEVICE) -o $(OUTPUT)_emulate.aocx -report 

profile: $(DEVICE)
	aoc -v -g -profile $(DEVICE) -o $(OUTPUT)_profile.aocx -report 

analyze: $(OUTPUT)_emulate.aocx
	aocl analyze-area $(OUTPUT)_emulate.aocx

profiling: $(OUTPUT).aocx
	aocl report $(OUTPUT).aocx profile.mon

client: $(HOST)
	g++ $(HOST)

host:
	vim host/src/main.cpp

device:
	vim $(DEVICE)


# Standard make targets
clean :
	$(ECHO)rm -f $(TARGET_DIR)/$(TARGET)

.PHONY : all clean
anonymous No title
Java
public class Main {

  public static void main(String[] args) {
    //型の変換
    int a = 10;
    double b = (double)a / 4;
    System.out.println(b);
  }

}
anonymous No title
Lisp
(doseq [_ (range 10)]
  (println ("Hello world!")))
anonymous No title
C++
#include <iostream>
#include <map>
using std::map;
using std::ostream;

typedef map<char, int> Plate;

ostream& operator << (ostream& os, Plate& p) {
	for (auto m_itr : p) {
		os << m_itr.first << " " << m_itr.second << std::endl;
	}
	return os;
}

/* // pointer ver.
class Dog {
	public:
	Dog(Plate& _plate, char _c) {
		plate = &_plate;
		c = _c;
		std::cout << "debug hoge" << *plate << std::endl; // debug
	}

	void bite() {
		std::cout << "debug fuga" << *plate << std::endl; // debug
		plate->at(c)--;
	}

	private:
	Plate* plate;
	char c;
};
// */

//* // ref. ver. // if you misstake something, then error message is very long and unreadable
class Dog {
	public:
	Dog(Plate& plate, char _c) : plate(plate) {
		c = _c;
		std::cout << "debug hoge" << plate << std::endl; // debug
	}

	void bite() {
		std::cout << "debug fuga" << plate << std::endl; // debug
		plate[c]--;
	}

	private:
	Plate& plate;
	char c;
};
// */

int main() {

	Plate shared_plate;
	shared_plate['p'] = 10;
	shared_plate['r'] = 10;

	Dog pochi = Dog(shared_plate, 'p');
	Dog ryo = Dog(shared_plate, 'r');

	pochi.bite();
	ryo.bite();

	std::cout << "debug " << std::endl << shared_plate << std::endl; // debug


	std::cout << "\e[38;5;0m\e[48;5;40m --- end ---  \e[m" << std::endl; // debug
	return 0;
}

anonymous No title
C++
#include <iostream>
#include <map>
using std::map;
using std::ostream;

typedef map<char, int> Plate;

//*
ostream& operator << (ostream& os, Plate& p) {
	for (auto m_itr : p) {
		os << m_itr.first << " " << m_itr.second << std::endl;
	}
	return os;
}
//*/

class Dog {
	public:
	Dog(Plate& _plate, char _c) {
		plate = &_plate;
		c = _c;
		std::cout << "debug hoge" << *plate << std::endl; // debug
	}

	void bite() {
		std::cout << "debug fuga" << *plate << std::endl; // debug
		plate->at(c)--;
	}

	private:
	Plate* plate;
	char c;
};

int main() {

	Plate shared_plate;
	shared_plate['p'] = 10;
	shared_plate['r'] = 10;

	Dog pochi = Dog(shared_plate, 'p');
	Dog ryo = Dog(shared_plate, 'r');

	pochi.bite();
	ryo.bite();

	std::cout << "debug " << std::endl << shared_plate << std::endl; // debug


	std::cout << "\e[38;5;0m\e[48;5;40m --- end ---  \e[m" << std::endl; // debug
	return 0;
}

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